Introduction to DLD

4 Input AND Gate

A 4-input AND gate is a digital logic gate with 4 inputs and 1 output.

  • The output is HIGH (1) when all three inputs are HIGH (1).
  • The output is LOW (0) when at least one input is LOW (0).

Example: For three inputs, there will be 4 variables (i.e., A, B, C) that may be used, and the output is also represented by a variable as “X”. The Boolean expression for a 4-input AND logic gate will be X = A.B.C.D

Let’s explain the 4-input AND logic gate symbol, Boolean expression, and Truth Table

4-Input AND Gate Symbol

The 4-Input AND logic gate symbol can be represented using three input terminals (taken as inputs), which are given in the following diagram as A, B, C, and D. The output is represented by “X = A . B . C . D.”.

    4-Input AND Gate Symbol    

4-Input AND Gate Using Three 2-Input AND Gates

The 4-Input AND logic gate symbol can be represented using three 2-input AND gates; each AND gate contains 2 inputs instead of 3.

  • First AND gate: Inputs A and B, and produces the output A . B.
  • Second AND gate: Inputs C and D, and produces the output C . D.
  • Third AND gate:  The outputs of the two AND gates will be given to the inputs of the third AND gate, which produces the result A . B . C . D.

The following diagram explains the process

3-Input OR Gate Using Three 2-Input OR Gates

4-Input AND Gate Boolean Expression

The Boolean expression of a 4-input AND gate with inputs A, B, C, and D and output X is:

  • X = A . B . C . D

Here, the symbol represents the AND operation. The following diagram shows the Boolean expression of a 4-input AND gate

4-Input AND Gate Boolean Expression

4-Input AND Gate Truth Table

The 4-input AND logic gate truth Table shows the output of all possible combinations of the given inputs A, B, C, and D. The output X becomes HIGH (1) when all inputs are HIGH (1). The output (“X”) becomes LOW (0), when any input is LOW (0).

The following diagram shows the truth table of a 4-input AND logic gate

AND Logic Gate Truth Table (4-Inputs)

Let’s explain the truth table of a 4-input AND logic gate

  • A = 0, B = 0, C = 0, D = 0: All inputs are LOW, so the output is 0 (LOW).
  • A = 0, B = 0, C = 0, D = 1: A, B, and C are LOW, so the output remains 0 (LOW).
  • A = 0, B = 0, C = 1, D = 0: A, B, and D are LOW, so the output remains 0 (LOW).
  • A = 0, B = 0, C = 1, D = 1: A and B are LOW, so the output is 0 (LOW).
  • A = 0, B = 1, C = 0, D = 0: A, C, and D are LOW, so the output is 0 (LOW).
  • A = 0, B = 1, C = 0, D = 1: A and C are LOW, so the output is 0 (LOW).
  • A = 0, B = 1, C = 1, D = 0: A and D are LOW, so the output is 0 (LOW).
  • A = 0, B = 1, C = 1, D = 1: A is LOW, so the output is 0 (LOW).
  • A = 1, B = 0, C = 0, D = 0: B, C, and D are LOW, so the output is 0 (LOW).
  • A = 1, B = 0, C = 0, D = 1: B and C are LOW, so the output is 0 (LOW).
  • A = 1, B = 0, C = 1, D = 0: B and D are LOW, so the output is 0 (LOW).
  • A = 1, B = 0, C = 1, D = 1: B is LOW, so the output is 0 (LOW).
  • A = 1, B = 1, C = 0, D = 0: C and D are LOW, so the output is 0 (LOW).
  • A = 1, B = 1, C = 0, D = 1: C is LOW, so the output is 0 (LOW).
  • A = 1, B = 1, C = 1, D = 0: D is LOW, so the output is 0 (LOW).
  • A = 1, B = 1, C = 1, D = 1: All inputs are HIGH, so the output becomes 1 (HIGH).

4-Input AND Gate – Timing Diagram

4-input AND gate Timing diagram showing the relationship between inputs A, B, C, and D and output X in a digital logic circuit.

4-Input AND Gate - Timing diagram

The diagram illustrates the logic-level transitions of three inputs (A, B, C, and D) and one output (X) over time.

  • Input A: Initially remains at logic 0, then changes to 1 midway through the timing interval and stays high.
  • Input B: Alternates between logic 0 and 1 at longer time intervals.
  • Input C: Toggles between 0 and 1 more frequently than A and B.
  • Input D: Switches between logic 0 and 1 at the highest frequency among all four inputs.
  • Output X: Remains at logic 0 for all input combinations except when A = 1, B = 1, C = 1, and D = 1, where it changes to logic 1.

The vertical dotted lines divide the diagram into equal time intervals, making it possible to compare the input transitions with the corresponding output behavior.