Types of CPU Organizations

The length of instruction depends on the CPU organization. There are four basic types of instructions in CPU Organization which are.

  • Zero Address Instruction (Stack Organization)
  • Single Address Instructions 
  • Two address instructions 
  • Three address instructions 

Basic computers use single address instructions. let explain all of the above instrctions

1. Zero Address Instruction (Stack Organization)

Zero addresses instructions having no operand with OPCODE.

Register Stack Organization

Register Stack Organization Follow the Rule Last In First Out (LIFO).  To add data in stack we use PUSH and to remove we will use POP. Stack organization can be implemented on RAM or Registers.

Here we explain the Implementation of registers as a stack.

Mostly 64 general registers are use for stack implementation, so 6 bits are require to address 64 registers.

SP is a stack pointer (top of the stack) which is use to store the address of that location where we have to push or pop any data. As SP stores the address of that location where we PUSH or POP data, so its size will be 6 bits.

We use two flags registers named as FULL and EMPTY.

If the value of FULL is 1, then Empty will be zero and vice versa.

and If FULL value is 1 then it means there is no more space to enter any new data.

If EMPTY value is 1 than it means we can add new data is stack organized registers.


As in diagram SP points Zero. When we want to add any data from the data register to the stack register.

 SP incremented by 1 and Points the first general register having address 1. If we want to add new data then SP incremented to again and data will be pushed to the second general register and so on. In this way, 63 (1 to 63) data values can be added to different 64 general-purpose registers.
When 64th data value is add to the 64-register stack organization then SP points to ZERO because (64= 1000000).  As SP size is 6-bits and a higher bit is discarded and least 6-bits are considered. So, SP value becomes (000000=0). When SP=0 then FULL=1 and EMPTY=0 which means there is no more space to PUSH 65th data value in stack.

How to PUSH DATA - CPU Organization

How to POP Data?

If we want to retrieve data from stack to Data Register then we use POP command. Memory location of SP Address is POP and sends data to Data Register. SP, decremented by 1. In same way next memory location of SP address is POP. We can remove more data from stack until SP points to zero. When SP=0 then EMPTY =1 and FULL=0. It means all stack is empty.

How to POP DATA - CPU Organization

EXAMPLE: Zero address instruction in register stack organization

Zero Address instruction - CPU Organization

When we apply any OPCODE like ADD, MUL etc. then it takes previous two operands from stack apply the operation on them and store the result in the position of first operand. We cannot use any operand with OPCODE because it is a Zero address instruction.

2. Single Address Instructions 

It is also known as Single Accumulator organization because OS use single operand. Here operand may be either the address of memory/ Register or may be a data itself.

It totally depends on addressing mode which tells us how to treat with operand to find actual data.

The format of instruction is: Opcode + Address (Operand)

Some examples of One Address Machine

Single Address instruction - CPU Organization

This technique totally replaced by the introduction of the new general register.


  • One of the operands is always held by the accumulator register. This results in short instructions and less memory space.
  • The Instruction cycle requires less time to complete


  • When complex expressions are executed then program size will increase due to the execution of many short instructions.
  • When the number of instructions increases for a program, then the execution time increases.

3. Two address instructions

Two and three address instructions are consider as general register organizations.

  •  Two address instructions use two operands (1 source and other destination). 
  • More registers are required. So, More space required for registers and buses. That’s it’s costly but speed is very high. But two address instruction speed and cost are less than three address instructions.
  • It is costly than single address instructions.

Two Address instruction - CPU Organization

4.  Three address instructions

  • Three address instructions use three operands (2 sources and one destination).
  • More the number of registers are require as compare to zero, single, two address instructions. So, More space required for registers and buses. That’s why, it is costly than other types of instructions.

Three Address instruction - CPU Organization


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